1. Field of the Invention
The present invention relates to a comparator having a large input voltage excursion, that is, the input voltage of the comparator is close to the high and low supply voltages. This type of comparator is generally called a rail-to-rail comparator.
2. Discussion of the Related Art
FIG. 1 shows a first conventional example of such a comparator.
The comparator is formed of a differential stage 1, having two positive and negative input voltages 2 and 3 which receive voltages V+, V- to be compared. An output terminal 4 of stage 1 controls a transistor Ts mounted in series with a current source 5 between two terminals A and M, on which are applied, respectively, high and low supply potentials Vdd and Vss.
In the example shown in FIG. 1, stage 1 is formed of two P-channel MOS transistors MP1, MP2, the respective gates of which are connected to terminals 2 and 3 and the respective sources of which are connected, via a current source 6, to terminal A. The drains of transistors MP1 and MP2 are respectively connected to the collector of an NPN-type bipolar transistor T1, T2, the emitter of which is connected to terminal M. Transistors T1 and T2 are connected as a current mirror and transistor T1 is diode-connected. Terminal 4 is formed by the drain of transistor MP2, connected to the base of NPN-type transistor Ts. The emitter of transistor Ts is connected to terminal M and its collector is connected to an output terminal S of the comparator connected, via current source 5, to terminal A.
When voltage V+ is lower than voltage V-, the voltage difference .DELTA.V between terminals 2 and 3 is negative and current I1 in transistor MP1 is higher than current I2 in transistor MP2. As transistor T2 attempts to reproduce current I1, it saturates, which blocks transistor Ts. Output voltage Vs of the comparator then corresponds to voltage Vdd-Vss, minus the voltage drop in current source 5. This voltage drop corresponds, for example if the current sources are realized by means of bipolar transistors, to the collector-emitter drop of a saturating bipolar transistor. If the current sources are formed of MOS transistors, this voltage drop corresponds to a drain-source voltage drop. Current sources 5 and 6 are generally formed of transistors connected as a current mirror.
When V+=V-(.DELTA.V=0), current I1 and I2 are balanced and transistor Ts is non-conducting. Terminal S is then substantially at potential Vdd.
When voltage V+ is higher than voltage V-(.DELTA.V&gt;0), current I2 is higher than current I1. The current mirror between transistors T1 and T2 maintains the collector currents of transistors T1 and T2 identical. As a result, transistor Ts saturates. Terminal S is then at potential Vss plus the collector-emitter voltage drop of saturating transistor Ts. Thus, the output voltage excursion substantially corresponds to the supply voltage.
However, for such an assembly to function, input voltages V+ and V- must respect a common mode constraint, that is, a voltage level constraint (independently from differential voltage .DELTA.V).
If the potential of one of terminals 2 and 3 is higher than potential Vdd, minus a threshold voltage Vth corresponding to a threshold voltage Vgsp of a P-channel MOS transistor (MP1 or MP2) plus voltage drop V6 in current source 6, the comparator no longer operates properly. If V-&gt;Vdd-Vth, transistor MP2 is non-conducting and transistor Ts can receive no base current. Terminal S is thus substantially at potential Vdd, whatever voltage V+. If V+&gt;Vdd-Vth, transistor MP1 is non-conducting and current I1 is zero. Transistors T1 and T2 are thus both non-conducting (they receive no base current). The only case where the result of the comparison is then nevertheless correct is when V-.ltoreq.Vdd-Vth since, as source 6 is not blocked, transistor Ts saturates and Vs.apprxeq.Vss.
In practice, the comparator of FIG. 1 thus requires input voltages which are, in the common mode, lower by approximately 1 to 1.5 volts than the positive supply voltage.
FIG. 2 shows a second example of comparator in which the operation of input differential stage 1' is limited to input voltages which are, in the common mode, higher than low supply potential Vss, plus a threshold voltage Vth'. Threshold voltage Vth' corresponds to a threshold voltage Vgsn of an N-channel MOS transistor, plus voltage drop V6' in current source 6' of stage 1'.
The assembly of FIG. 2 is similar to that of FIG. 1, but is inverted with respect to terminals A and M and uses N-channel transistors MN1 and MN2 instead of the P-channel MOS transistors of FIG. 1, and PNP-type bipolar transistors T'1, T'2, and T's instead of transistors T1, T2, Ts of the assembly of FIG. 1.
In the voltage operating range of the comparator of FIG. 2, if .DELTA.V.gtoreq.0, transistor T's is blocked and Vs.apprxeq.Vss. If .DELTA.V&lt;0, transistor T's saturates and Vs.apprxeq.Vdd. However, if V-&lt;Vss+Vth', transistor MN2 is blocked and cannot take current from the base of transistor T's which is thus blocked. Voltage Vs is then in the low state, independently from differential voltage .DELTA.V. If V+&lt;Vss+Vth', transistor MN1 is blocked. Transistors T'1 and T'2 are then blocked. The only case where the result of the comparison is nevertheless correct is when V-.gtoreq.Vss+Vth', since, as source 6' is not blocked, transistor T's saturates and Vs.apprxeq.Vdd.
In practice, the comparator of FIG. 2 thus requires input voltages which are, in the common mode, higher by approximately 1 to 1.5 volts than the negative supply voltage.
It should be noted that the problems described hereabove, in relation to assemblies using both transistors in bipolar technology and in MOS technology, arise in the same manner for comparators realized in integrated bipolar technology or integrated MOS technology.
It would be desirable to have a comparator operating at least over the entire range of common mode voltages of the circuit, that is, withstanding input voltages at least in the entire supply voltage range (Vdd-Vss) while keeping a large output voltage excursion.
Document EP-A-0512795 describes a comparator consisting of MOS transistors combining two stages respectively designed for operating with a common mode input voltage substantially equal to one of the supply voltages. This combination allows, for the comparator as a whole, input voltages reaching the supply voltages in common mode. However, this circuit is limited to a use of MOS transistors with the output transistors.